教學大綱表 Syllabus
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課程名稱
Course Title		 (中文) 積體電路設計
(英文) Integrated Circuit Design 		開課單位
Departments		 電機工程學系
課程代碼
Course No.		 E2200
授課教師
Instructor		 黃淑絹
學分數
Credit		 3.0 必/選修
core required/optional		 選修 開課年級
Level		 大三
先修科目或先備能力Course Pre-requisites：電子學 ( 一 ),電子學 ( 二 )
課程概述與目標 Course Overview and Goals：使學生熟悉運算放大器, 訊號轉換器原理及應用、濾波器、訊號產生器的原理以及數位電子設計應用。
教科書
Textbook		 A. S. Sedra and K. C. Smith, Microelectronic Circuits, 7th edition, Oxford University Press, 2016.
參考教材
Reference		 Behzad Razavi, Microelectronics, 2e, Wiley, ISBN 978-1-118-16506-5
課程大綱
Syllabus		 學生學習目標
Learning Objectives		 單元學習活動
Learning Activities		 學習成效評量
Evaluation		 備註
Notes
週
Week		 單元主題
Unit topic		 內容綱要
Content summary
1 Loop gain, stability problem Determining the loop gain,Phase margin,Gain margin,
Frequency compensation 		Determining the loop gain,Phase margin,Gain margin,
Frequency compensation		  
2 OPerational- amplifier circuits CMOS amplifier I CMOS amplifier I  
3 OPerational- amplifier circuits CMOS amplifier II CMOS amplifier II  
4 OPerational- amplifier circuits CMOS SPICE Simulation CMOS SPICE Simulation  
5 Filters and tuned amplifier 1. Introduction ,Filter Transmission, Types, and specification,
Filter Transfer Function
2. Butterworth and Chebyshev Filters 		1. Introduction ,Filter Transmission, Types, and specification,
Filter Transfer Function
2. Butterworth and Chebyshev Filters
  • 作業Assignment
    •      		HW1  
    6 Filters and tuned amplifier 1. The Second-Order LCR Resonator
    2. Second-Order Active Filters Based on Inductor Replacement
    3. Second-Order Active Filters Based on the Two-Integrator-Loop
    Topology     		1. The Second-Order LCR Resonator
    2. Second-Order Active Filters Based on Inductor Replacement
    3. Second-Order Active Filters Based on the Two-Integrator-Loop
    Topology    		  
    7 Filters and tuned amplifier 1. Single-Amplifier Biquadratic Active Filters
    2. Tuned Amplifiers     		1. Single-Amplifier Biquadratic Active Filters
    2. Tuned Amplifiers
  • 平時考Test
  • 作業Assignment
    •      		HW2,Quiz1  
    8 Signal Generators and Waveform-Shaping Circuits The Wien-bridge oscillator, Phase-shift oscillator,
    Active-filter-tuned oscillator
    LC-tuned oscillators, Crystal Oscillators
    Bistable Multivibrators,Generation of Square and Triangular
    Waveforms Using Astable Multivibrators,Generation of a Standardized
    Pulse The Monostable Multivibrato     		The Wien-bridge oscillator, Phase-shift oscillator,
    Active-filter-tuned oscillator
    LC-tuned oscillators, Crystal Oscillators    		  
    9 10期中考 期中考 期中考
  • 期中考Midterm
    •      		 
    10 Signal Generators and Waveform-Shaping Circuits Integrated-Circuit Timers,
    Precision half-wave rectifier, Full-wave rectifier     		Integrated-Circuit Timers,
    Precision half-wave rectifier, Full-wave rectifier
  • 作業Assignment
    •      		SPICE1  
    11 CMOS Digital Logic Circuits Digital Logic Inverters, CMOS Inverter Digital Logic Inverters, CMOS Inverte  
    12 CMOS Logic-Gate Circuits Dynamic Operation of the CMOS
    Inverter, CMOS Logic-Gate Circuits     		Dynamic Operation of the CMOS
    Inverter,CMOS Logic-Gate Circuits
  • 作業Assignment
    •      		SPICE2  
    13 Advanced MOS and Bipolar Logic Circuits Pseudo-NMOS Logic Circuits,
    Pass-Transistor Logic (PTL) Circuits     		Pseudo-NMOS Logic Circuits,
    Pass-Transistor Logic (PTL) Circuits    		  
    14 Advanced MOS and Bipolar Logic Circuits Dynamic MOS Logic Circuits, Dynamic MOS Logic Circuits,
  • 作業Assignment
    •      		SPICE3  
    15 Memory Circuits 16.1 Latches and Flip-Flops
    16.2 Semiconductor Memories: Types and Architectures     		16.1 Latches and Flip-Flops
    16.2 Semiconductor Memories: Types and Architectures
  • 作業Assignment
    •      		SPICE4  
    16 Memory Circuits 16.3 Random-Access Memory (RAM) Cells
    16.4 Sense-Amplifier and Address Decoders     		16.3 Random-Access Memory (RAM) Cells
    16.4 Sense-Amplifier and Address Decoders
  • 平時考Test
    •      		 
    17 Read-Only Memory (ROM) Read-Only Memory (ROM) Read-Only Memory (ROM)  
    18 期末考 Digital Logic Circuits Digital Logic Circuits
  • 期末考Final Exam
    •      		 

    教學要點概述 Overview of Teaching Points：
    教材編選 Teaching Materials： ■ 自編教材 Handout by Instructor □ 教科書作者提供 Textbook
    評量方法 Evaluation： 期末考Final Exam：30%   期中考Midterm：30%   平時考Test：20%   作業Assignment：20%  
    教學資源 Teaching Resources： □ 教材電子檔 Soft Copy of the Handout or the Textbook □ 課程網站 Website
    課程網站：https://ilearn.ttu.edu.tw
    扣考規定 The rule of being able to take the final exam of the course：http://eboard.ttu.edu.tw/ttuwebpost/showcontent-news.php?id=504